/* add user code begin Header */
/**
  **************************************************************************
  * @file     at32f415_int.c
  * @brief    main interrupt service routines.
  **************************************************************************
  *                       Copyright notice & Disclaimer
  *
  * The software Board Support Package (BSP) that is made available to
  * download from Artery official website is the copyrighted work of Artery.
  * Artery authorizes customers to use, copy, and distribute the BSP
  * software and its related documentation for the purpose of design and
  * development in conjunction with Artery microcontrollers. Use of the
  * software is governed by this copyright notice and the following disclaimer.
  *
  * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
  * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
  * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
  * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
  * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
  *
  **************************************************************************
  */
/* add user code end Header */

/* includes ------------------------------------------------------------------*/
#include "at32f415_int.h"

/* private includes ----------------------------------------------------------*/
/* add user code begin private includes */
#include "sys.h"
#include "cx_os_time.h"
#include "cx_timer.h"
/* add user code end private includes */

/* private typedef -----------------------------------------------------------*/
/* add user code begin private typedef */

/* add user code end private typedef */

/* private define ------------------------------------------------------------*/
/* add user code begin private define */
void PendSV_Handler(void) __attribute__ ((naked, aligned(8)));
void SVC_Handler(void) __attribute__ ((naked, aligned(8)));
/* add user code end private define */

/* private macro -------------------------------------------------------------*/
/* add user code begin private macro */

/* add user code end private macro */

/* private variables ---------------------------------------------------------*/
/* add user code begin private variables */
extern cx_timer_interface_t cx_timer0;
volatile long long ticks = 0;
/* add user code end private variables */

/* private function prototypes --------------------------------------------*/
/* add user code begin function prototypes */

/* add user code end function prototypes */

/* private user code ---------------------------------------------------------*/
/* add user code begin 0 */

/* add user code end 0 */

/* external variables ---------------------------------------------------------*/
/* add user code begin external variables */

/* add user code end external variables */

/**
  * @brief  this function handles nmi exception.
  * @param  none
  * @retval none
  */
void NMI_Handler(void)
{
  /* add user code begin NonMaskableInt_IRQ 0 */

  /* add user code end NonMaskableInt_IRQ 0 */

  /* add user code begin NonMaskableInt_IRQ 1 */

  /* add user code end NonMaskableInt_IRQ 1 */
}

/**
  * @brief  this function handles hard fault exception.
  * @param  none
  * @retval none
  */
void HardFault_Handler(void)
{
  /* add user code begin HardFault_IRQ 0 */

  /* add user code end HardFault_IRQ 0 */
  /* go to infinite loop when hard fault exception occurs */
  while (1)
  {
    /* add user code begin W1_HardFault_IRQ 0 */

    /* add user code end W1_HardFault_IRQ 0 */
  }
}

/**
  * @brief  this function handles memory manage exception.
  * @param  none
  * @retval none
  */
void MemManage_Handler(void)
{
  /* add user code begin MemoryManagement_IRQ 0 */

  /* add user code end MemoryManagement_IRQ 0 */
  /* go to infinite loop when memory manage exception occurs */
  while (1)
  {
    /* add user code begin W1_MemoryManagement_IRQ 0 */

    /* add user code end W1_MemoryManagement_IRQ 0 */
  }
}

/**
  * @brief  this function handles bus fault exception.
  * @param  none
  * @retval none
  */
void BusFault_Handler(void)
{
  /* add user code begin BusFault_IRQ 0 */

  /* add user code end BusFault_IRQ 0 */
  /* go to infinite loop when bus fault exception occurs */
  while (1)
  {
    /* add user code begin W1_BusFault_IRQ 0 */

    /* add user code end W1_BusFault_IRQ 0 */
  }
}

/**
  * @brief  this function handles usage fault exception.
  * @param  none
  * @retval none
  */
void UsageFault_Handler(void)
{
  /* add user code begin UsageFault_IRQ 0 */

  /* add user code end UsageFault_IRQ 0 */
  /* go to infinite loop when usage fault exception occurs */
  while (1)
  {
    /* add user code begin W1_UsageFault_IRQ 0 */

    /* add user code end W1_UsageFault_IRQ 0 */
  }
}

/**
  * @brief  this function handles svcall exception.
  * @param  none
  * @retval none
  */
void SVC_Handler(void)
{
  /* add user code begin SVCall_IRQ 0 */

  /* add user code end SVCall_IRQ 0 */
  /* add user code begin SVCall_IRQ 1 */
  cx_uint32_t ulBASEPRI;
  ulBASEPRI = EntryCriticalFromISR();
  asm volatile (
        "   ldr r3, =CurrentTask         \n" // Load address of CurrentTask into r3
        "   ldr r1, [r3]                 \n" // Load value of CurrentTask (current task control block pointer) into r1
        "   ldr r0, [r1]                 \n" // Load process stack pointer from the current task control block
        "   ldmia r0!, {r4-r11}          \n" // Restore r4-r11 from the process stack
        "   msr psp, r0                  \n" // Update PSP with the new process stack pointer
        "   isb                          \n" // Instruction Synchronization Barrier
        "   mov r0, #0                   \n" // Clear base priority mask
        "   msr basepri, r0              \n" // Set base priority register to 0 to enable all interrupts
        "   orr r14, #0xd                \n" // Modify the EXC_RETURN value to return to Thread mode with PSP
        "   bx r14                       \n" // Branch to the return address (exit the handler)
        "   nop                          \n" // No operation (in case of alignment issues)
  );
    ExitCriticalFromISR(ulBASEPRI);
  /* add user code end SVCall_IRQ 1 */
}

/**
  * @brief  this function handles debug monitor exception.
  * @param  none
  * @retval none
  */
void DebugMon_Handler(void)
{
  /* add user code begin DebugMonitor_IRQ 0 */

  /* add user code end DebugMonitor_IRQ 0 */
  /* add user code begin DebugMonitor_IRQ 1 */

  /* add user code end DebugMonitor_IRQ 1 */
}

/**
  * @brief  this function handles pendsv_handler exception.
  * @param  none
  * @retval none
  */
void PendSV_Handler(void)
{
  /* add user code begin PendSV_IRQ 0 */

  /* add user code end PendSV_IRQ 0 */
  /* add user code begin PendSV_IRQ 1 */
  cx_uint32_t ulBASEPRI = EntryCriticalFromISR();
   asm volatile (
        "   mrs r0, psp                  \n" // Move PSP (Process Stack Pointer) to r0
        "   isb                          \n" // Instruction Synchronization Barrier
        "   ldr r3, =CurrentTask         \n" // Load address of CurrentTask into r3
        "   ldr r2, [r3]                 \n" // Load value of CurrentTask (current task control block pointer) into r2
        "   stmdb r0!, {r4-r11}          \n" // Store r4-r11 on the process stack
        "   str r0, [r2]                 \n" // Save the new process stack pointer into the current task control block
        "   stmdb sp!, {r3, r14}         \n" // Store r3 (CurrentTask) and r14 (return address) on the main stack
        "   mov r0, #191                 \n" // Set base priority mask to 191 (0xBF) to disable interrupts with priority lower or equal to 191
        "   msr basepri, r0              \n" // Set base priority register
        "   dsb                          \n" // Data Synchronization Barrier
        "   isb                          \n" // Instruction Synchronization Barrier
        "   bl TaskSwitchContext         \n" // Call TaskSwitchContext function
        "   mov r0, #0                   \n" // Clear base priority mask
        "   msr basepri, r0              \n" // Set base priority register to 0 to enable all interrupts
        "   ldmia sp!, {r3, r14}         \n" // Restore r3 (CurrentTask) and r14 (return address) from the main stack
        "   ldr r1, [r3]                 \n" // Load value of CurrentTask (new task control block pointer) into r1
        "   ldr r0, [r1]                 \n" // Load new process stack pointer from the new task control block
        "   ldmia r0!, {r4-r11}          \n" // Restore r4-r11 from the new process stack
        "   msr psp, r0                  \n" // Update PSP with the new process stack pointer
        "   isb                          \n" // Instruction Synchronization Barrier
        "   bx r14                       \n" // Branch to the return address (exit the handler)
        "   nop                          \n" // No operation (in case of alignment issues)
    );
    ExitCriticalFromISR(ulBASEPRI);
  /* add user code end PendSV_IRQ 1 */
}

/**
  * @brief  this function handles TMR1 Overflow and TMR10 handler.
  * @param  none
  * @retval none
  */
void TMR1_OVF_TMR10_IRQHandler(void)
{
  /* add user code begin TMR1_OVF_TMR10_IRQ 0 */
  if(tmr_interrupt_flag_get(TMR10,TMR_OVF_INT))
  {
    ticks++;
    SoftHandler(&cx_timer0);
    tmr_flag_clear(TMR10, TMR_OVF_FLAG);
  }
  /* add user code end TMR1_OVF_TMR10_IRQ 0 */
  /* add user code begin TMR1_OVF_TMR10_IRQ 1 */

  /* add user code end TMR1_OVF_TMR10_IRQ 1 */
}

/**
  * @brief  this function handles USART1 handler.
  * @param  none
  * @retval none
  */
void USART1_IRQHandler(void)
{
  /* add user code begin USART1_IRQ 0 */

  /* add user code end USART1_IRQ 0 */
  /* add user code begin USART1_IRQ 1 */

  /* add user code end USART1_IRQ 1 */
}

/* add user code begin 1 */


/* add user code end 1 */
